Leading companies are working on 32 nm designs; 65 nm features are in production in leading semiconductor companies. As process generations move, a new challenge arose for the IC design and manufacturing industry. Because critical dimensions on the wafer became smaller than the wavelength and photolithography approached the resolution limits of wafer exposure tools, the industry is experiencing degraded image fidelity and reduced yields. Proximity effect correction and phase-shifting masks are now elements of modern technology.
Perfect masks are the key in improving the lithography process. A few major factors contribute to variations of critical dimensions (CD). Accurate proximity correction is one necessary task to improve CD-control. Correction for fogging, charging, dry etch microloading and macroloading effects are also important.
Resist heating in electron beam maskmaking has been identified as one of the major contributor to error budget. To make a long story short, the problem is the following: electron beams deposit most of their energy as heat. Temperature may rise to hundreds degrees in a local area of a few microns. This temperature rise varies over the pattern. Resist sensitivity depends on temperature. Thus, pattern-dependent distortions are significant. Because of pattern dependence, these errors are hard to find and they are commonly mistaken for "unstable process".
Understanding and correcting heating distortions became a critical task for the industry. On the other hand, modeling of heat transfer in a multilayer target in conditions of electron lithography is an incredibly hard task: an exact solution does not exist.
Each single heat source is a dynamic 3D function of electron scattering in resist and substrate, millions of these sources (E-beams) consequently hit the resist to fabricate the pattern.
It is very simple for the process engineer to introduce his data into our TEMPTATION (Temperature Simulation) software using our friendly graphical user interface, simply press the button - Voila! -Here is your simulation result! It is that easy!
Any parameter of the process - resist, writing strategy, beam current, etc. can be optimized to minimize the distortion. A library of physical parameters is available.
CD-SEM measurement of linewidth, while providing good relative results, is not completely accurate. The measurements involve significant bias of the SEM signal at line edges. The bias varies depending on the SEM setup, the materials and profiles of patterns on the wafer, as well as charging. Existing methods of CD-SEM calibration are extremely limited, only being available for specific samples and materials.
NIST, leading CD-SEM manufacturers compliment measurement with SEM simulation. In the simulation, a 3D pattern is exactly known. The SEM signal can be simulated for a variety of pattern materials and SEM setups. The corresponding linewidths can be extracted for each type of measurement. The SEM signal can be related to the pattern; then the bias can be found for any combination of SEM and patterns. This has the potential to greatly improve CD-SEM accuracy, toward the goal of absolute linewidth measurements.
CHARIOT modeling software uses advanced physical models to achieve high accuracy. It is used by major manufacturers and users of CD-SEM and defect inspection systems.
Key members of Abeamtech have over 20 years of experience in electron beam lithography (EBL), photolithography, and scanning electron microscopy (SEM).
Expertise in electron beam technology includes: